1. Technical Field
The description relates to techniques for designing on-chip systems.
One or more embodiments may apply to Network-on-Chip (NoC) interconnects, e.g., for System-on-Chip (SoC) arrangements.
One or more embodiments may provide a scalable and distributed approach to perform traffic routing in hierarchical interconnects, possibly by resorting to an architecture for a scalable SoC source map.
2. Description of the Related Art
Time-to-market is a factor increasingly dictating the success of modern and complex SoC products, such as application processors for mobile and multimedia applications (smartphone/tablet, Set-Top Box, Home Gateway, and so on).
So-called “platforms” are thus increasingly resorted to in order to facilitate the creation of different SoC products (derivatives) for different market segments.
A “platform” is a system which may be used, e.g., to prototype a System-on-Chip design.
Certain platform embodiments as disclosed, e.g., in EP 2 325 747 A2 may include an electronic board comprising a logic device programmable to emulate system components and a processor to execute a virtual machine monitor which redirects an input/output request to the system components via an interconnect.
It was observed that embodiments of a platform may rely on a certain architecture and a related methodology which may take advantage of common features of different SoC products to reduce the development cycle and facilitate software portability from one derivative to another.
Design and verification of, e.g., a silicon interconnect is often a time-consuming task which drastically affects time-to-market of products. This may be even more evident in a platform context when attempting to derive derivative interconnects from a common and generic interconnect.
Various embodiments may thus benefit from the possibility that a certain interconnect may be customized for various derivatives. However, different derivatives may have different underlying physical constrains, which may render interconnect re-usage difficult (if at all feasible).
It was observed that when trying to adapt a generic interconnect to a derivative one, a good deal of time may be devoted to reworking the Source Map. The Source Map provides the information for routing response transactions from slave IPs to master IPs (that initiate request transactions towards slave IPs). While the relative cost may be acceptable for certain embodiments, the possibility of avoiding such re-working activity may contribute to making the platform approach more efficient by reducing costs and development time.